Home page
SIMCHECK Application Note


The Access Time from Clock (Tac) is one of the important timing parameters of the SDRAM memory device and it is critical for PC-100 standard compliance. This application note explains the Tac timing parameter, illustrates its dependency on CAS Latency 2 or 3, and explains how the Sync DIMMCHECK measurement of this parameter is used to interpret compliance with the Intel PC-100/PC-66 standards.

Access Time From Clock (Tac)

The access time from the clock signal (Tac) is dependent on the CAS Latency setup. For CAS Latency 3, first data is valid at the rising edge of the third clock from the read command. For CAS Latency 2, first data is valid at the rising edge of the second clock from the read command. The following drawing illustrates the CAS Latency in a simplified way. It is assumed that the bank ACTIVE command, which is needed to start any SDRAM activity, has been properly initiated prior to the READ command. The read data can be a burst of 1,2,4,8, or even a full page of data, depending on the SDRAM setup. Therefore, CAS Latency determines when the first data is valid.

As shown in the drawing, for CAS Latency 2, the Tac parameter is the time from the rising edge of the first clock after the READ command to the time that first data is valid. For CAS Latency 3, the Tac parameter is the time from the rising edge of the second clock after the READ command to the time that first data is valid. The access time from clock is also called Output Valid From Clock.

Simplified SDRAM Read Operation Diagram

INTEL PC-100/PC-66 Tac Limits

Intel specifies the following limits for the Tac parameter:

Output Valid From Clock (Tac) PC-66 PC-100
CAS Latency=2 Limited Application 10.0 nS 7.0 nS
CAS Latency=2 Full Application 9.0 nS 6.0 nS
CAS Latency=3 Full Application 9.0 nS 6.0 nS

Intel specs acquired from the Intel Serial Presence Detect Specification revision 1.2A; further information can be acquired by visiting http://developer.intel.com/design/pcisets/memory/index.htm.

Sync DIMMCHECK Tac Measurements

At the start of the Basic test, SIMCHECK II measures the module's Tac at CAS Latencies of two and three. If the module has two banks, SIMCHECK takes the slower measurements (higher access time in nS) into account. The program uses specific margins to determine if the tested module exhibits Tac in the range of the PC-100 standard or the PC-66 standard. These measurements are shown in the SPEED summary screen at the end of the Basic test (or if you press F5 during Basic test) as follows:

Screen Image Screen Image

The same data is also recorded in the Test Log as follows:

Screen Image Screen Image

The SIMCHECK program uses the Tac measurements to determine the test frequency of the module during Basic Test. A module which indicates a Tac Range of <PC-100> will be run at 100MHz, while a module with a Tac Range of <PC-66> will be run at 83MHz. Other timing problems of the module may cause it to drift to lower speeds during Basic test or subsequent tests.

Please note that you can still override the speed (using Test Setup or the Change-on-the-Fly feature) to cause a module with a Tac measurement of even 8nS to run at 100MHz, but of course, such a module cannot meet the PC-100 specification of 6nS. Therefore, the fact that a module may run on SIMCHECK at 100MHz or more does not imply that the module is indeed PC-100 compliant.

Some modules which are not certified for PC-100 (and their SPD indicates that they are intended for PC-66) may still score within the <PC-100> range on SIMCHECK, as their access times are indeed quite fast. However, such modules may still exhibit unfavorable results in an actual PC-100 application, as there are several other factors involved in PC-100 compliance. On the same token, some PC-100 modules may slightly miss our margin of accuracy and score within the <PC-66> range.

An exact measurement of Tac requires the use of a very expensive tester with a variable temperature oven, sub-nanosecond accuracy, and complex capabilities to compensate for all loading effects. SIMCHECK II and the Sync DIMMCHECK have an inherent inaccuracy of about +/-1 nS in determining the Tac measurements. Therefore, we are using the notion of Tac RANGE to allow for such measurement inaccuracies and to encourage the user to consider the actual Tac measurements. Other aspects of the SIMCHECK test (some still under development) are further used to determine compliance with the PC-100.

Please note that unlike some of our competitors who measure speed by extrapolating access time measurements while running the modules at very slow clock rates (e.g. 25MHz), Sync DIMMCHECK actually runs the module at the indicated speed. For example, if a module is displayed to run at 125MHz, this is the exact clock rate that the Sync DIMMCHECK provides to the module (you can verify this fact with an oscilloscope connected to the module clock lines). SIMCHECK II and the Sync DIMMCHECK actually measure Tac by averaging a group of measurements done automatically at 80MHz, 96MHz, 100MHz and 112MHz.

Back To Home Page

Products |  What's New  |  Sales  |  Tech Support |  Downloads  |  Employment  |  Company  |  Contact Us
©1995, 2003 INNOVENTIONS, INC.  All rights reserved.